1. Field
Methods and apparatuses consistent with exemplary embodiments of the inventive concept relate to determining fracture of a register file and reconfiguring a register file by fixing up the fracture in a processor.
2. Description of the Related Art
For example, as shown in FIG. 1A, a layout of architectural registers of the vector register file (VRF) in Aarch32 layout of an ARMv7 processor (ARMv7 is a trademark of ARM, Ltd., Cambridge, U. K.) is configured such that it introduces potential “narrow-to-wide” dependencies among source and destination registers. The narrow-to-wide dependency represents a situation where reading a large size value could result in reading of multiple smaller size registers. For example, reading a quad word could result in reading multiple single registers or double registers if producers of the quad word were multiple single words or double words. Similarly, reading a double word could result in reading two single registers.
As shown in FIG. 1A, in the 32-bit register layout (Aarch32 layout of an ARMv7 processor), a quad register (e.g., Q15) maps to two double registers (e.g., D31 and D32), and a double register (e.g., D15) maps to two single registers (e.g., S31 and S30). As shown in FIG. 1B, in the 64-bit register layout (Aarch64 layout of an ARMv8 processor), each entry (Q0, Q1, Q2, Q3 . . . ) maps to a single register regardless of the size.
In the above examples, an instruction with one quad register source could require up to four single register sources or a combination of single register sources and double register sources. Therefore, if there are multiple quad register sources in an instruction, the true number of register sources required can be much greater, and therefore, consumption of power and time in instruction processing is not negligible.
Handling the narrow-to-wide dependency can be very expensive in terms of area and power, and can also be a bottle neck of performance. Further, when reading a large size value (e.g., a quad word value) requires reading multiple smaller size registers, the large size source is fractured, area and power consumption in the processor is more aggravated. For example, fracturing may occur because producer instructions (as architecturally specified) only write a portion of a full architectural register and these instructions are specified by the microarchitecture to write their result into a unique physical register. As such, the value of an architectural register may be split across multiple physical registers, and thus the “fracture” represents a situation where contents of an architectural register source are split across multiple physical registers.